The present invention relates to a semiconductor device and a manufacturing method therefor, and more particularly to structures of a gate electrode and a bit contact of a highly integrated DRAM and a manufacturing method therefor.
A conventional method of manufacturing a MOS transistor having a conventional metal gate electrode will now be described with reference to FIG. 1.
As shown in FIG. 1A, a gate insulation film 212 is formed on a P-type silicon semiconductor substrate 211, and then a polysilicon film 213, a barrier metal 214 for preventing reactions between polysilicon and a tungsten film and a tungsten film 215 are deposited. Then, a known lithography method and RIE (Reactive Ion Etching) method are employed to pattern gate electrodes. Then, gate electrodes are used as mask for ion implantation for implanting N-type impurities so that a source/drain diffusion regions 216 are formed in the semiconductor substrate 211.
Then, a silicon nitride film 217 is deposited on the overall surface, as shown in FIG. 1B. Then, etching back is performed by the RIE method so that side wall spacers of the silicon nitride film 217 are formed on the side walls of the gate electrodes.
The above-mentioned conventional manufacturing method cannot form a contact hole of a type which approaches gate electrodes in a self alignment manner. That is, the contact hole can be formed when an insulation film 218 is formed on the overall surface, and then a contact hole 219 is formed in the insulation film 218 by using a mask (not shown), as shown in FIG. 1C. What is worse, the tungsten film is exposed to a portion of the gate electrode after the gate electrodes have been formed (see FIG. 1B). As a result, there arises a problem in that the side walls of the gates cannot be oxidized and thus RIE damages or ion implantation damages cannot be restored. When the silicon nitride films 217 serving as the side wall spacers have been formed, the quality of the silicon nitride films deposited on the metal deteriorates as compared with the silicon nitride film deposited on the insulation film or polysilicon. Therefore, there arises a problem in that side walls having a satisfactory quality cannot be formed.
Accordingly, an object of the present invention is to provide a semiconductor apparatus capable of forming a contact hole adjacent to a gate electrode in a self alignment manner and a manufacturing method therefor.
According to one aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming, on the gate insulation film, a gate electrode formed by a first conductive film; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming, on a side wall of the gate electrode, a spacer formed by a first insulation film; a step of forming a second insulation film on the overall surface and etching back the second insulation film to the same height as that of the gate electrode so that the surface is flattened; a step of etching the gate electrode in the direction of the depth thereof to have a predetermined thickness so as to form a first stepped portion from the first insulation film; a step of filling up the first stepped portion by a second conductive film; a step of etching the second conductive film in the direction of the depth thereof to have a predetermined thickness so as to form a second stepped portion from the first insulation film; and a step of filling up the second stepped portion by a third insulation film.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming, on the gate insulation film, a gate electrode formed by a first conductive film; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming, on a side wall of the gate electrode, a spacer formed by a first insulation film; a step of forming a second insulation film on the overall surface and etching back the second insulation film to the same height as that of the gate electrode so that the surface is flattened; a step of etching the gate electrode in the direction of the depth thereof to have a predetermined thickness so as to form a first stepped portion from the first insulation film; a step of filling up the first stepped portion by a second conductive film; a step of etching the second conductive film in the direction of the depth thereof to have a predetermined thickness so as to form a second stepped portion from the first insulation film; a step of filling up the second stepped portion by a third insulation film; and a step of etching the second insulation film by a selective etching method using the third insulation film as a mask so as to form a contact hole adjacent to the gate electrode.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming a first conductive film on the gate insulation film; a step of forming a dummy film on the first conductive film; a step of patterning the dummy film and the first conductive film to form a gate electrode; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming, on the side wall of the dummy film and the first conductive film, a spacer formed by the first insulation film; a step of forming a second insulation film on the overall surface and etching back the second insulation film to the same height as that of the gate electrode so that the surface is flattened; a step of etching the dummy film to form a first stepped portion from the first insulation film; a step of filling up the first stepped portion by the second conductive film; a step of etching the second conductive film in a direction of the depth thereof to have a predetermined thickness so as to form a second stepped portion from the first insulation film; and a step of filling up the second stepped portion by a third insulation film.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming a first conductive film on the gate insulation film; a step of forming a dummy film on the first conductive film; a step of patterning the dummy film and the first conductive film to form a gate electrode; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming, on a side wall of the dummy film and the first conductive film, a spacer formed by the first insulation film; a step of forming a second insulation film on the overall surface and etching back the second insulation film to the same height as that of the gate electrode so that the surface is flattened; a step of etching the dummy film to form a first stepped portion from the first insulation film; a step of filling up the first stepped portion by the second conductive film; a step of etching the second conductive film in a direction of the depth thereof to have a predetermined thickness so as to form a second stepped portion from the first insulation film; a step of filling up the second stepped portion by a third insulation film; and a step of etching the second insulation film by a selective etching method using the third insulation film as a mask so that a contact hole adjacent to the gate electrode is formed.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming, on the gate insulation film, a gate electrode formed by a first conductive film; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming, on the side wall of the gate electrode, a spacer formed by a first insulation film; a step of forming a second insulation film on the overall surface and etching back the second insulation film to the same height as that of the gate electrode so that the surface is flattened; a step of etching the gate electrode in the direction of the depth thereof to have a predetermined thickness so as to form a first stepped portion from the first insulation film; a step of filling up the first stepped portion by a second conductive film; a step of etching the second conductive film in the direction of the depth thereof to have a predetermined thickness so as to form a second stepped portion from the first insulation film; a step of filling up the second stepped portion by a third insulation film; a step of etching the second insulation film by a selection etching method using the third insulation film as a mask to form a contact hole adjacent to the gate electrode; and a step of filling up the inside portion of the contact hole to form a bit line and a storage node contact.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film composed of metal; a self-aligned contact formed adjacent to the gate electrode; a second insulation film formed by a first insulation film and silicon nitride formed by the lower electrode of the gate electrode and the self-aligned contact; and a third insulation film formed between the upper electrode and the self-aligned contact and made of silicon nitride.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; a self-aligned contact formed adjacent to the gate electrode; a second insulation film composed of a first insulation film and silicon nitride, the first insulation film being composed of silicon oxide formed between the lower electrode of the gate electrode and the self-aligned contact; and a third insulation film formed by silicon nitride formed between the upper electrode and the self-aligned contact and a fourth insulation film made of silicon nitride.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; a self-aligned contact formed adjacent to the gate electrode; a first insulation film formed between the lower electrode of the gate electrode and the self-aligned contact and made of silicon oxide, a second insulation film made of silicon nitride and a third insulation film made of silicon nitride; and a fourth insulation film formed between the upper electrode and the self-aligned contact and made of silicon nitride.
According to another aspect of the present invention, there is provided a dynamic semiconductor memory device comprising a memory cell portion, wherein the memory cell portion includes a semiconductor apparatus having a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; a self-aligned contact formed adjacent to the gate electrode; a first insulation film formed between the lower electrode of the gate electrode and the self-aligned contact and made of silicon oxide and a second insulation film made of silicon nitride; and a third insulation film formed between the upper electrode and the self-aligned contact and made of silicon nitride.
According to another aspect of the present invention, there is provided a dynamic semiconductor memory device comprising a memory cell portion, wherein the memory cell portion includes a semiconductor device having a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; a self-aligned contact formed adjacent to the gate electrode; a first insulation film formed between the lower electrode of the gate electrode and the self-aligned contact and made of silicon oxide and a second insulation film made of silicon nitride; and a third insulation film formed between the upper electrode and the self-aligned contact and made of silicon nitride and a fourth insulation film made of silicon nitride.
According to another aspect of the present invention, there is provided a dynamic semiconductor memory device comprising a memory cell portion, wherein the memory cell portion includes a semiconductor device having a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; a self-aligned contact formed adjacent to the gate electrode; a first insulation film formed between the lower electrode of the gate electrode and the self-aligned contact and made of silicon oxide, a second insulation film made of silicon nitride and a third insulation film made of silicon nitride; and a fourth insulation film formed between the upper electrode and the self-aligned contact and made of silicon nitride.
According to another aspect of the present invention, there is provided a semiconductor device comprising first and second transistors each having a gate insulation film formed on a semiconductor substrate and a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal, wherein the thickness of the upper electrode of the second transistor is larger than the thickness of the upper electrode of the first transistor.
According to another aspect of the present invention, there is provided a dynamic semiconductor memory device comprising a memory cell portion including a first transistor having a gate insulation film formed on a semiconductor substrate and a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; and a peripheral circuit including a second transistor having a gate insulation film formed on a semiconductor substrate and a gate electrode formed on the gate insulation film and composed of a lower electrode made of a first conductive film containing silicon and a lower electrode formed by a second conductive film made of metal, wherein the thickness of the upper electrode are larger than the thickness of the upper electrode of the first transistor.
According to another aspect of the present invention, there is provided a dynamic semiconductor memory device comprising a device isolation insulation film formed on a semiconductor substrate; a MOSFET formed on the semiconductor substrate through a gate insulation film and composed of a gate electrode consisting of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal and a source diffusion layer and a drain diffusion layer which are formed on the semiconductor substrate; a first insulation film formed to cover the MOSFET; first and second self-aligned contacts formed on the first insulation film to be formed adjacent to the gate electrode; a first insulation film formed between the lower electrode of the gate electrode and the first and second self-aligned contacts and made of silicon oxide and a second insulation film made of silicon nitride; a third insulation film formed between the upper electrode and the first and second self-aligned contacts and made of silicon nitride; a bit line electrically connected to either the self-aligned contact or the second self-aligned contact; and a capacitor composed of a storage electrode, a capacitor insulation film and a plate electrode and electrically connected to either the first self-aligned contact or the second self-aligned contact which is not electrically connected to the bit line.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate; a gate insulation film formed on the semiconductor substrate; a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; and a first insulation film formed on a side wall of the lower electrode and made of silicon oxide, wherein a portion of the upper electrode overlaps an upper portion of the first insulation film.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming a gate insulation film on a semiconductor substrate; a step of forming, on the gate insulation film, a gate electrode formed by a first conductive film; a step of forming, on the semiconductor substrate, source/drain diffusion layers; a step of forming a first insulation film and etching back to the same height as that of the gate electrode so that the surface is flattened; a step of etching the gate electrode in a direction of the depth thereof to have a predetermined thickness to form a stepped portion from the first insulation film; and a step of filling up the stepped portion by a second conductive film.
According to another aspect of the present invention, there is provided a semiconductor device comprising a semiconductor substrate; a gate insulation film formed on the semiconductor substrate and a gate electrode formed on the gate insulation film and composed of a lower electrode formed by a first conductive film containing silicon and an upper electrode formed by a second conductive film made of metal; and a first insulation film formed on a side wall of the lower electrode and made of silicon oxide.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device comprising a step of forming, on a semiconductor substrate, first insulation film portions each containing impurities having a conductive type opposite to that of the semiconductor substrate, the first insulation film portions being formed at predetermined intervals; a step of introducing the impurities included in the first insulation film into the semiconductor substrate to form source/drain diffusion layers; a step of depositing a gate insulation film on the overall surface including the upper surface of the semiconductor substrate; a step of filling up portions among the first insulation film portions with first conductive film portions through the gate insulation film; a step of etching the first conductive film filling up the portions in a direction of the depth thereof to have a predetermined thickness so as to form a stepped portion from the first insulation film; a step of filing up the stepped portion by a second insulation film; and a step of removing the gate insulation film formed on the first insulation film and the first insulation film formed below the gate insulation film to form a contact hole leading to the surface of the source/drain diffusion layers.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.